about the company
I've recently partnered with a highly renowned semicon client that's looking to expand their IC Design Team. They are currently looking for several Senior IC design engineers that's highly experienced in the end to end IC design process
about the job
job description:
- Lead the end-to-end design of integrated circuits (ICs), from conceptual design to silicon implementation, for various applications such as [automotive, consumer electronics, communications, etc.].
- Collaborate with system architects and cross-functional teams to define IC specifications and requirements.
- Perform RTL design and coding using hardware description languages such as VHDL or Verilog.
- Conduct functional verification of IC designs, including simulation and debugging using tools like ModelSim, Questa, or similar platforms.
- Work closely with Physical Design Engineers to ensure that the design meets performance, area, and power goals, and resolve any layout-related issues.
- Optimize IC designs for timing, power, and area, ensuring that all design objectives are met.
- Lead design reviews, providing guidance and mentorship to junior engineers.
- Engage in static timing analysis (STA), formal verification, and power analysis to ensure that designs are robust and meet performance targets.
- Work with the DFT (Design for Testability) team to implement and verify test structures.
- Manage tape-out processes, collaborating with fabrication foundries to ensure successful silicon realization.
skills and experiences required :
...
- Alteast 8 years of hands-on experience in IC design, with a proven track record of successful tape-outs.
- Strong expertise in digital design or analog/mixed-signal IC design.
- Proficient in RTL design using VHDL/Verilog and simulation tools like ModelSim, Questa, or NC-Sim.
- Solid understanding of semiconductor physics, CMOS technology, and sub-micron design processes.
- Experience with EDA tools such as Cadence or Synopsys for synthesis, simulation, and timing closure.
- Proficiency in static timing analysis, power optimization, and area optimization.
- Knowledge of DFT methodologies and implementation.
- Excellent problem-solving skills, with the ability to troubleshoot and debug complex issues.
- Strong communication skills with the ability to collaborate with multi-disciplinary teams and mentor junior engineers.
skills and experiences that are a great to have:
- Experience in high-speed digital design, RFIC, or mixed-signal ICs.
- Familiarity with FPGA prototyping and post-silicon validation.
- Experience with chip-level power analysis and EMI mitigation techniques.
- Familiarity with ASIC verification flows, including UVM or OVM.
how to apply :If you're interested,please kindly apply using the link. Please note that only shortlisted candidates will be contacted by Janice Sivasothey